Running_From_Flash_spra958i.pdf

Running an Application from Internal Flash Memory on the TMS320F28xxx DSP David M.Alter Embedded Processors and Microcontrollers-Semiconductor Group ABSTRACT Several special requirements exist for running an application from on-chip flash memory on the TMS320F28xxx DSP.These requirements generally do not manifest themselves during development in RAM since the Code Composer Studio(CCS)debugger can mask problems associated with initialized sections and how they are linked to memory.This application report covers the requirements needed to properly configure application software for execution from on-chip flash memory.Requirements for both DSP/BIOS and non-DSP/BIOS projects are presented.Some performance considerations and techniques are also discussed.Example CCS v4 and v3 projects are provided for the F2812,F2808,F28335,F28027 and F28035(i.e.,the superset device in each F28xxx sub-family).These can be downloaded from http:/ provide a starting point for code development irrespective of this application report,if desired.Note that the issues discussed in this application report apply to current members of the TMS320F28xxx device family,specifically:F281x:F2810,F2811,F2812 F280 x/2801x/2804x:F2801,F2802,F2806,F2808,F2809,F28015,F28016,F28044 F2823x/2833x:F28232,F28234,F28235,F28332,F28334,F28335 F2802x:F28020,F28021,F28022,F28023,F28026,F28027,F280200 F2803x:F28032,F28033,F28034,F28035 Applicability to future F28xxx devices,although likely,is not guaranteed.Further,the code and methods presented in this application report applies to the development tools versions utilized,specifically:CCS v4 examples:CCS v4.2.0.09018,C-compiler v5.2.7,DSP/BIOS v5.41.06.21 CCS v3 examples:CCS v3.3.83.19,C-compiler v5.2.7,DSP/BIOS v5.33.06 Be aware that future tool versions may have differences that make some of the items discussed here unnecessary,although in all likelihood backwards compatibility will be maintained,so that the techniques discussed here should still work.Finally,this application report does not provide a tutorial on writing and building code for the F28xxx.It is assumed that the reader already has at least the main framework of their application running from RAM.This report only identifies the special items that must be considered when moving the application into on-chip flash memory.Code Composer Studio and DSP/BIOS are trademarks of Texas Instruments.Trademarks are the property of their respective owners.Application Report SPRA958I Aug 2010 1SPRA958I 2 Running an Application from Internal Flash Memory on the TMS320F28xxx DSP Contents 1 Introduction.3 2 Creating a User Linker Command File.3 2.1 Non-DSP/BIOS Projects.3 2.2 DSP/BIOS Projects.4 3 Where to Link the Sections.5 3.1 Non-DSP/BIOS Projects.6 3.2 DSP/BIOS Projects.7 4 Copying Sections from Flash to RAM.9 4.1 Copying the Interrupt Vectors(non-DSP/BIOS projects only).9 4.2 Copying the.hwi_vec Section(DSP/BIOS projects only).10 4.3 Copying the.trcdata Section(DSP/BIOS projects only).10 4.4 Initializing the Flash Control Registers(DSP/BIOS and non-DSP/BIOS projects).12 4.5 Maximizing Performance by Executing Time-critical Functions from RAM.14 4.6 Maximizing Performance by Linking Critical Global Constants to RAM.15 4.6.1 Method 1:Running All Constant Arrays from RAM.15 4.6.2 Method 2:Running a Specific Constant Array from RAM.19 5 Programming the Code Security Module Passwords.21 6 Executing Your Code from Flash after a DSP Reset.25 7 Disabling the Watchdog Timer During C-Environment Boot.28 8 C-Code Examples.30 8.1 General Overview.30 8.2 Directory Structure.32 8.3 Additional Information.32 References.36 Revision History.37 Figures Figure 1.Specifying the User Init Function in the DSP/BIOS Configuration tool.11 Figure 2.Specifying the Link Order In Code Composer Studio v4.17 Figure 3.Specifying the Link Order In Code Composer Studio v3.18 Figure 4.DSP/BIOS MEM Properties for CSM Password Locations.23 Figure 5.DSP/BIOS MEM Properties for CSM Reserved Locations.24 Figure 6.DSP/BIOS MEM Properties for Jump to Flash Entry Point.26 Tables Table 1.Section Linking in Non-DSP/BIOS Projects(Large memory model).6 Table 2.Section Linking In DSP/BIOS Projects(Large Memory Model).7 Table 3.CCSv4 and CCSv3 Example Code Directory Descriptions.32 SPRA958I Running an Application from Internal Flash Memory on the TMS320F28xxx DSP 3 1 Introduction The TMS320F28xxx DSP family has been designed for standalone operation in embedded controller applications.The on-chip flash usually eliminates the need for external non-volatile memory and a host processor from which to bootload.Configuring an application to run from flash memory is a relatively easy matter provided that one follow a few simple steps.This report covers the major concerns and steps needed to properly configure application software for execution from internal flash memory.Requirements for both DSP/BIOS and non-DSP/BIOS projects are presented.Some performance considerations and techniques are also discussed.Example CCS v4 and v3 projects are provided for the F2812,F2808,F28335,F28027 and F28035(i.e.,the superset device in each F28xxx sub-family).These can be downloaded from http:/ provide a starting point for code development irrespective of this application report,if desired.Note that the issues discussed in this application report apply to current members of the TMS320F28xxx device family,specifically:F281x:F2810,F2811,F2812 F280 x/2801x/2804x:F2801,F2802,F2806,F2808,F2809,F28015,F28016,F28044 F2823x/2833x:F28232,F28234,F28235,F28332,F28334,F28335 F2802x:F28020,F28021,F28022,F28023,F28026,F28027,F280200 F2803x:F28032,F28033,F28034,F28035 Applicability to future F28xxx devices,although likely,is not guaranteed.Further,the code and methods presented in this application report applies to the development tools versions utilized,specifically:CCS v4 examples:CCS v4.1.3,C-compiler v5.2.7,DSP/BIOS v5.41.02.14 CCS v3 examples:CCS v3.3.83.19,C-compiler v5.2.7,DSP/BIOS v5.33.06 Be aware that future tool versions may have differences that make some of the items discussed here unnecessary,although in all likelihood backwards compatibility will be maintained,so that the techniques discussed here should still work.Finally,this application report does not provide a tutorial on writing and building code for the F28xxx.It is assumed that the reader already has at least the main framework of their application running from RAM.This report only identifies the special items that must be considered when moving the application into on-chip flash memory.2 Creating a User Linker Command File 2.1 Non-DSP/BIOS Projects In non-DSP/BIOS applications,the user linker command file will be where most memory is defined,and where the linking of most sections is specified.The format of this file is no different than the linker command file you are currently using to run your application from RAM.The difference will be in where you link the sections(to be discussed in Section 3).More information on linker command files can be found in reference 13.The non-DSP/BIOS code projects that accompany this application report contain linker command files that can be used for reference.SPRA958I 4 Running an Application from Internal Flash Memory on the TMS320F28xxx DSP The DSP28 peripheral header files(see references 21-26)contain linker command files named DSP281x_Headers_nonBIOS.cmd DSP2833x_Headers_nonBIOS.cmd DSP280 x_Headers_nonBIOS.cmd DSP2802x_Headers_nonBIOS.cmd DSP2804x_Headers_nonBIOS.cmd DSP2803x_Headers_nonBIOS.cmd These files contains linker MEMORY and SECTIONS declarations for linking the peripheral register structures.Since CCS supports having more than one linker command file in a project,all one needs to do is add the appropriate one of these linker command files to your code project in addition to your user linker command file.In general,the order of the linker command files is unimportant since during a project build,CCS evaluates the MEMORY section of every linker command file before evaluating the SECTIONS section of any linker command file.This ensures that all memories are defined before linking any sections to those memories.However,advanced users may need manual control over the order of linker command file evaluation in some rare situations.This can be specified within CCS v4 on the Project Properties menu,CCS Build Settings selection,Link Order tab,or within CCS v3 on the Project Build Options menu,Link Order tab.2.2 DSP/BIOS Projects The DSP/BIOS configuration tool generates a linker command file that specifies how to link all DSP/BIOS generated sections,and by default all C-compiler generated sections.When running your application from RAM,this linker command file may be the only one in use.However,when executing from flash memory,there will likely be a need to generate and link one or more user defined sections.In particular,any code that configures the on-chip flash control registers(e.g.flash wait-states)cannot execute from flash.In addition,one may want to run certain time critical functions from RAM(instead of flash)to maximize performance.A user linker command file must be created to handle these user defined sections.Beyond the user and DSP/BIOS generated linker command files,the DSP28 peripheral header files(see references 21-26)contain linker command files named DSP281x_Headers_BIOS.cmd DSP2833x_Headers_BIOS.cmd DSP280 x_Headers_BIOS.cmd DSP2802x_Headers_BIOS.cmd DSP2804x_Headers_BIOS.cmd DSP2803x_Headers_BIOS These file contains linker MEMORY and SECTIONS declarations for linking the peripheral register structures.Since CCS supports having more than one linker command file in a project,all one needs to do is add all three linker command files to their project.In general,the order of the linker command files is unimportant since during a project build,CCS evaluates the MEMORY section of every linker command file before evaluating the SECTIONS section of any linker command file.This ensures that all memories are defined before linking any sections to those memories.However,advanced users may need manual control over the order of linker command file evaluation in some rare situations(for example,to preempt and override DSP/BIOS linkage of a section).This can be specified within CCS v4 on the Project Properties menu,CCS Build Settings window,Link Order tab,or within CCS v3 on the Project Build Options menu,Link Order tab.SPRA958I Running an Application from Internal Flash Memory on the TMS320F28xxx DSP 5 3 Where to Link the Sections Two basic section types exist:initialized,and uninitialized.Initialized sections must contain valid values at device power-up.For example,code and constants are found in initialized sections.When designing a stand-alone embedded system with the F28xxx DSP(e.g.,no emulator or debugger in use,no host processor present to perform bootloading),all initialized sections must be linked to non-volatile memory(e.g.,on-chip flash).An uninitialized section does not contain valid values at device power-up.For example,variables are found in uninitialized sections.Code will write values to the variable locations during code execution.Therefore,uninitialized sections must be linked to volatile memory(e.g.,RAM).It is suggested that the-w linker option be invoked(it is selected by default for all newly created CCS projects).The-w option will produce a warning if the linker encounters any sections in your project that have not been explicitly specified for linking in a linker command file.When the linker encounters an unspecified section,it uses a default allocation algorithm to link the section into memory(it will link the section to the first defined memory with enough available free space).This is almost always risky,and can lead to unreliable and unpredictable code behavior.The-w option will identify any unspecified sections(e.g.,those accidentally forgotten by the user)so that the user can make the necessary addition to the appropriate linker command file.In CCS v4 projects,the-w option checkbox is found on the Project Properties menu,C/C+Build window,Tool Settings tab,C2000 Linker:Diagnostics category.In CCS v3 projects,the-w option checkbox is found on the Project Build Options menu,Linker tab,Advanced category.CAUTION:It is important that the large memory model be used with the C-compiler(as opposed to the small memory model).Small memory model requires certain initialized sections to be linked to non-volatile memory in the lower 64Kw of addressable space.However,no flash memory is present in this region on any F28xxx devices,and this will likely be true for future F28xxx devices as well.Therefore,large memory model should be used.For CCS v4 projects,the large memory model checkbox is found on the Project Properties menu,C/C+Build window,Tool Settings tab,C2000 Compiler:Runtime Model Options category.For CCS v3 projects,the large memory model checkbox is found on the Project Build Options menu,Compiler tab,Advanced category.For non-DSP/BIOS projects,one should include the large memory model C-compiler runtime support library into their code project.For the fixed-point devices,this is library rts2800_ml.lib(as opposed to rts2800.lib,which is for the small memory model).For the floating-point devices,this is file rts2800_fpu32.lib for plain C code,or rts2800_fpu32_eh.lib for C+code(there are no small memory model libraries for the floating-point devices).In CCS v4,there is an“Automatic”setting for the library that can be used if desired to have CCS select the correct library for you based on your project settings(e.g.,floating point support and memory model selections).For DSP/BIOS projects,DSP/BIOS will take care of including the required library.The user should not include any runtime support library in a DSP/BIOS project.SPRA958I 6 Running an Application from Internal Flash Memory on the TMS320F28xxx DSP 3.1 Non-DSP/BIOS Projects The compiler uses a number of specific sections.These sections are the same whether you are running from RAM or flash.However,when running a program from flash,all initialized sections must be linked to non-volatile memory,whereas all uninitialized sections must be linked to volatile memory.Table 1 shows where to link each compiler generated section on the F28xxx DSP.Information on the function of each section can be found in reference 7.Any user created initialized section should be linked to flash(e.g.,those sections created using the CODE_SECTION compiler pragma),whereas any user created uninitialized sections should be linked to RAM(e.g.,those sections created using the DATA_SECTION compiler pragma).Table 1.Section Linking in Non-DSP/BIOS Projects(Large memory model)Section NameWhere to Link.cinit Flash.cio RAM.const Flash.econst Flash.pinit Flash.switch Flash.text Flash.bss RAM.ebss RAM.stack Lower 64Kw RAM.sysmem RAM.esysmem RAM.reset RAM1 Table 1 Notes:1 The.reset section contains nothing more than a 32-bit interrupt vector that points to the C-compiler boot function in the runti