8.18.4程序设计与仿真电子琴VHDL程序包含有：顶层程序、音阶发生器程序、数控分频模块程序和自动演奏模块程序。1.顶层程序与仿真（1）顶层VHDL程序--文件名：top.vhd--功能：顶层文件--最后修改日期：2004.3.20libraryIEEE;useIEEE.STD_LOGIC_1164.ALL;useIEEE.STD_LOGIC_ARITH.ALL;useIEEE.STD_LOGIC_UNSIGNED.ALL;entitytopisPort(clk32MHz:instd_logic;--32MHz系统时钟handTOauto:instd_logic;--键盘输入/自动演奏code1:outstd_logic_vector(6downto0);--音符显示信号index1:instd_logic_vector(7downto0);--键盘输入信号high1:outstd_logic;--高低音节信号spkout:outstd_logic);--音频信号endtop;architectureBehavioraloftopiscomponentautomusicPort(clk:instd_logic;Auto:instd_logic;index2:instd_logic_vector(7downto0);index0:outstd_logic_vector(7downto0));endcomponent;componenttonePort(index:instd_logic_vector(7downto0);code:outstd_logic_vector(6downto0);high:outstd_logic;tone0:outintegerrange0to2047);endcomponent;componentspeakerPort(clk1:instd_logic;tone1:inintegerrange0to2047;spks:outstd_logic);endcomponent;signaltone2:integerrange0to2047;signalindx:std_logic_vector(7downto0);beginu0:automusicportmap(clk=>clk32MHZ,index2=>index1,index0=>indx,Auto=>handtoAuto);u1:toneportmap(index=>indx,tone0=>tone2,code=>code1,high=>high1);u2:speakerportmap(clk1=>clk32MHZ,tone1=>tone2,spks=>spkout);endBehavioral;（2）仿真顶层文件仿真图如图8.18.2所示。图8.18.2顶层文件仿真图2.音阶发生器程序与仿真（1）音阶发生器VHDL程序--文件名：tone.vhd。--功能：libraryIEEE;useIEEE.STD_LOGIC_1164.ALL;useIEEE.STD_LOGIC_ARITH.ALL;useIEEE.STD_LOGIC_UNSIGNED.ALL;entitytoneisPort(index:instd_logic_vector(7downto0);--音符输入信号code:outstd_logic_vector(6downto0);--音符显示信号high:outstd_logic;--高低音显示信号tone0:outintegerrange0to2047);--音符的分频系数endtone;architectureBehavioraloftoneisbeginsearch:process(index)--此进程完成音符到音符的分频系数译码，音符的显示，高低音阶begincaseindexiswhen"00000001"=>tone0<=773;code<="1001111";high<='1';when"00000010"=>tone0<=912;code<="0010010";high<='1';when"00000100"=>tone0<=1036;code<="0000110";high<='1';w...
